The disclosure relates to a nonvolatile memory device, and more particularly, to a phase-change nonvolatile memory device using a phase-change material and a method of fabricating the same.
Recently, a Phase-change Random Access Memory (PRAM) device has been proposed as a nonvolatile semiconductor memory device. A unit memory cell of a phase-change memory device uses a phase-change material as a data storage medium. The phase-change material has two stable phases (e.g., an amorphous phase and a crystalline phase) depending on the heat supplied thereto. A known phase-change material is a Ge—Sb—Te (GST) compound that is a mixture of germanium (Ge), antimony (Sb), and Tellurium (Te).
If the phase-change material is heated for a short time at a temperature close to its melting temperature (Tm) and is then cooled quickly, the phase-change material changes from the crystalline phase into the amorphous phase. On the contrary, if the phase-change material is heated for a long time at a crystallization temperature lower than the melting temperature and is then cooled slowly, the phase-change material changes from the amorphous phase to the crystalline phase. The phase-change material has a higher resistivity in the amorphous phase than in the crystalline phase. Thus, whether data stored in a phase-change memory cell is logical ‘1’ or logical ‘0’ can be determined by detecting a current flowing through the phase-change material.
Heat is supplied to effect a phase-change in the phase-change material. For example, a current is supplied to an electrode connected with the phase-change material, so that heat is generated from the electrode and supplied to the phase-change material. The temperature caused by the heat supplied to the phase-change material varies depending on the supplied current.
Thus, one of the most important factors in development of a high-integration phase-change memory device is to supply a sufficient current to an electrode connected with a phase-change material, that is, an operation current (e.g., a program (write) current or an erase current). To this end, a method has been proposed to use a PN diode as a switching device of the phase-change memory device. A PN diode allows a higher integration ratio of the phase-change memory device and increases the operation current in comparison with a Metal-Oxide-Semiconductor (MOS) transistor or a bipolar transistor.
FIG. 1A is a schematic plan view of a known phase-change memory device using a PN diode. FIG. 1B is a cross-sectional view of the phase-change memory device taken along line X-X′ of FIG. 1A.
Referring to FIGS. 1A and 1B, the known phase-change memory device includes: a substrate 11 having a device isolation region (not numbered) and an active region 12, a lower electrode 13 having a PN diode structure including a stack of an N-type silicon layer 13A and a P-type silicon layer 13B on the substrate 11 of the active region 12, an insulating layer 14 covering the lower electrode 13 and burying a heating layer 15, a phase-change material layer 16 disposed on the insulating layer 14 to contact the heating layer 15, and an upper electrode 17 disposed on the phase-change material layer 16. The heating layer 15 is plug-shaped, and a program region 18 of a hemispheric shape is formed in the phase-change material layer 16 in contact with the heating layer 15.
The size of the phase-change memory device is desirably reduced for high integration and low power consumption of the phase-change memory device. However, a sufficiently high operation current is required because high-temperature heat should be generated to change the phase of the phase-change material layer 16. Accordingly, there is a limit in reducing the size of the lower electrode 13 (i.e., the size of the PN diode) that controls the operation current.
Accordingly, a method has been proposed to reduce the operation current of the phase-change memory device with the above-described structure by reducing the contact area between the heating layer 15 and the phase-change material layer 16 by reducing the size of the heating layer 15. This method can generate high-temperature heat even in the event of a decrease in the operation current, because the resistance of the heating layer 15 increases with a decrease in the contact area between the phase-change material layer 16 and the heating layer 15.
However, the known method uses an expensive fine patterning technology (e.g., a photolithography process using an ArF exposure source) to form the heating layer 15. This increases the fabrication cost of the phase-change memory device. Moreover, the fine patterning technology has a limitation in that it is difficult to increase the integration ratio of the phase-change memory device.